1. Field
Embodiments relate to semiconductor memory devices and, more particularly, to a semiconductor memory device having a swap function to allow proper reading of a status register.
2. Description
In general, semiconductor memory devices, e.g., a dynamic random access memory (DRAM), have a high integration density and operate at high speeds. DRAMs include memory cells as storage units, each memory cell typically having one access transistor and one storage capacitor.
A micro processing unit in a data processing system may access data through a DRAM. In this case, internal information of the DRAM may need to be accessed. To this end, a status register read mode may be provided to the DRAM. When the DRAM enters the status register read mode, internal information of the DRAM may be output through pre-assigned data output pads.
DRAM chips may be packaged in various ways according to intended uses thereof. An arrangement of external pins of a package may be different from an arrangement of data output pads of a DRAM chip in the package. Therefore, swapping may be performed for data output pads of the package. Swapping may make normal operation in the status register read mode difficult to ensure. Accordingly, when the DRAM chip is mounted in a package having an arrangement of pins different from an arrangement of data output pads through which the memory-related unique information is output in a predetermined operation mode of the DRAM chip, measures are needed to allow a controller external to the DRAM chip to reliably read memory-related unique information of the DRAM chip.